[UCI-Calit2] Upcoming IEEE Event

[Anna Lynn Spitzer]

The IEEE Orange County Computer Society

and

IEEE-OC GameSIG (Video Game Engineering SIG)

Present

 

PROGRAMMING WITH MULTI-THREADING FOR MULTI-CORE PROCESSOR ARCHITECTURES

 

 

Date:  Jan 22, 2007

 

Speaker:  Stephen Jenks, Ph.D.

Electrical Engineering & Computer Science

University of California, Irvine

 

 

Time: Social Hour:    6 p.m.

        Dinner:             6:30 p.m.

 
Presentation:  7 p.m.

 

Location:     The Doubletree Club Orange County Airport

       7 Hutton Centre Drive,

Santa Ana, CA, 92707-5794

714-751-2400

 

Cost of dinner:           w/RSVP     no RSVP

                                          Member
$25.00      $30.00

                  Student                         $20.00       $30.00

      Unemployed Member $20.00      $30.00

                  Non-Member                $30.00      $35.00

                  Presentation Only                   FREE            

 

 

RSVP:

 (please RSVP even if you plan to attend only the presentation)

 

RSVP & prepay for dinner via credit card online:

https://www.123signup.com/register?id=qnpvt

 

RSVP for presentation only or for payment at door

by e-mail to:

occs-rsvp at ieee.org

pay at the door by cash or check (no credit cards)

 

Questions to Event Coordinator Hemant Sharma at hemantca at ieee.org

 

ABSTRACT

Parallel microprocessors are becoming ubiquitous as current mainstream
CPU vendors such as Intel, AMD and IBM all support multiple simultaneous
threads in hardware. These processors provide more total throughput than
their predecessors, but tend to be slower for single-threaded programs
than the fastest single-core CPUs. Therefore, programming with threads
is essential to achieve the maximum capability of these new processors.

 

This presentation will begin with an introduction to and overview of
multi-core processors and multi-threading, and will then explore the
trend towards parallelism in commodity CPUs, including the Cell
processor, but will focus on mainstream computing. The architecture
trade-offs in the CPUs leading to significant bottlenecks will be
examined. Multi-threaded programming, using POSIX threads and OpenMP,
will be briefly shown and evaluated. Two program execution paradigms to
overcome the bottlenecks in parallel CPUS will be introduced and
explored.

 

 

BIOGRAPHY

Dr. Stephen Jenks is the director of the Scalable Parallel and
Distributed Systems Laboratory (SPDS) at UCI, where is an assistant
professor in the Department of Electrical Engineering and Computer
Science, and holds a joint appointment to the Donald Bren School of
Information and Computer Sciences.

 

Jenks received his B.S. degree from Carnegie Mellon University in 1987,
and his M.S. and Ph.D. degrees from the University of Southern
California in 1992

and 2000, respectively. He designed advanced avionics and medical
systems for 14 years at Northrop Grumman Corp. He is now teaching
courses in advanced system software, parallel computer architecture, and
distributed processing in EECS. His research interests include parallel
and distributed computing. He is a Co-PI of the HIPerWall project, a 200
million-pixel tiled display. He is a member of ACM and the IEEE Computer
Society.

 

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