[CPCC] TALK: Design of CMOS IEEE 802.11a/b/g Transceivers

Ender Ayanoglu ayanoglu@uci.edu
Thu Apr 1 12:13:52 2004


Challenges in the Design of Integrated CMOS Transceivers for the
           IEEE 802.11a/b/g Wireless LAN Standards

                      Masoud Zargari
             Atheros Communications, Irvine, CA

                       April 5, 2004
                            11 AM
                            ET 331


Abstract:
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The frontiers of wireless communications is characterized by:
wider bandwidth, higher carrier frequency, higher levels of
integration, use of mainstream CMOS technology, and use of
sophisticated signal processing.  These requirements make the
design of such systems quite challenging.

This talk describes the design of an integrated multistandard
wireless LAN transceiver in CMOS technology with focus on both
system-level and circuit implementation issues.  The design of
the analog  frontend IC will be presented in detail along with
its impact on the overall system performance.  The transceiver,
implemented in a generic 0.25um CMOS process, provides all of
the radio functions for the IEEE 802.11a/b/g standards without
requiring any off-chip active components or filters.


Biography:
----------
Masoud Zargari received his M.Sc. and Ph.D. degrees in electrical
engineering from Stanford University, Stanford, CA, in 1993 and
1997 respectively.  From 1996 to 1998 he was a member of the
technical staff at Wireless Access Inc., Santa Clara, CA. where
he worked on the design and development of wireless systems for
two-way messaging networks.  In 1998 he joined Atheros Communications
as a member of the founding team where he is currently Director of
analog design focusing on integrated systems for the IEEE 802.11
based wireless local area networks.  During 1999 and 2000 Dr. Zargari
was a consulting assistant professor at Stanford University where he
taught courses in the area of RF and analog integrated circuit design.

Directions: http://www.cpcc.uci.edu/Directions-CPCC-UCI.htm